SoC Verification is a process in which a design is tested (or verified) against a given design specification before tape-out. This happens along with the development of the design and can start from the time the design architecture definition happens. The main goal of verification is to ensure the functional correctness of the design before the tape out. However, with increasing design complexities, the scope of verification is also evolving to include much more than functionality. This includes verification of performance and power targets, security and safety aspects of design and complexities with multiple asynchronous clock domains.
The graduates from Electronics/Electrical domain will be learning the basics of VLSI in their academics. With the core knowledge of Design Verification, students can compete with ease for employability in semiconductor industries. Also, the working professionals who have a desire in pursuing their careers in ASIC design can opt for this course. The current demands of industries are analyzed, and the course content is set accordingly.